Intel MCS-51 processor family

Indel 8051 chip Many years ago (1987) I was programming the 8052 professionally and I had all the assemblers and a PL/M compiler and an in circuit emulator at my development seat. At a certain point I knew the processor in and out and every trick it had. I really loved this processor, I started with an 8031 and external eprom but soon we switched to Atmel series of 8052 chips with internal flash memory. All of our low end modems had the 8052 as MCU in them. I even made a Basic version once but at the time modems needed much more processing power, we switched to Intel 80188 processors. But even nowadays I still used the STC and Atmel 8752 in a lot of electronic projects. I even build an 8052 programming IDE for Windows 10 / 11. I also collect old processors so I have a love of MCS-51 types of chips in my collection, not only from Intel but also from a lot of other manufacturers. On this page I give an overview of the MCS-51 family MCU’s and the different types.
Regards, Hein Pragt.

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About the MCS-51 processor family

Intel p8051

The MCS-51 family succeeds the MCS-48 family, if you take a closer look at both you will see the resemblance. The architect of the Intel MCS-51 instruction set was John H. Wharton (21 Sept 1954 – 14 Nov 2018) who was an American engineer specializing in microprocessors and he did an amazing job. Intel's original versions were very popular in the 1980s and early 1990s, and compatible derivatives remain popular up to today. It is an example of a CISC computer, but also has some of the features of RISC architectures, such as a large register set and separate memory spaces for program instructions and data. (Harvard architecture). Intel's first MCS-51 family was developed using NMOS technology just like its predecessor Intel MCS-48, but later versions with the letter C in their name are in CMOS technology. This made them also more suitable for battery-powered devices. Nowadays Intel no longer manufactures the MCS-51 family processors but a lot of derivatives made by numerous vendors remain popular today and are still produced and even enhanced. The new MCS-51 based microcontrollers typically include extra features like an extra UART, extra timers, AD converters, Extra ports and internal eeprom memory to store the programming code. Also the original 8051 core ran at 12 clock cycles per machine cycle, with most instructions executing in one or two machine cycles. Enhanced 8051 cores are now commonly used which run at six, four, two, or even one clock per machine cycle and have clock frequencies of up to 100 MHz.

The family

Name Int. ram int. (ep)rom I/O pins Timers Interrupts Extra features
8031 128 bytes None(external) 32 2 5 None
8032 256 bytes None(external) 32 2 6 None
8044 192 bytes 4 Kb fact. mask rom32 2 5 Slave processor build in SDLC protocol
8344 192 bytes None (external)32 2 5 Slave processor build in SDLC protocol
8744 192 bytes 4 Kb UV eprom 32 2 5 Slave processor build in SDLC protocol
8051 128 bytes 4 Kb Rom 32 2 5 None
8052 256 bytes 8 Kb Rom 32 3 6 None
8054 256 bytes 16 Kb Rom 32 3 6 None
8058 256 bytes 32 Kb Rom 32 3 6 None
8751 128 bytes 4 Kb Uv eprom 32 2 5 None
8752 256 bytes 8 Kb UV eprom 32 3 6 None
DS89C420 256 bytes `16 Kb Flash 32 3 6 None
DS89C440 256 bytes `32 Kb Flash 32 3 6 None
DS89C450 256 bytes `64 Kb Flash 32 3 6 None
DS80C320 256 bytes `None 32 3 6 None
DS87520 256 bytes 16 Kb UV eprom 32 3 6 None
AT89C1051 64 bytes 1 Kb Flash 15 1 3 Analog Comparator
AT89C2051 128 bytes 2 Kb Flash 15 1 3 Analog Comparator
AT89C4051 128 bytes 4 Kb Flash 15 1 3 Analog Comparator
AT89C2052 256 bytes 2 Kb Flash 15 1 3 UART: Enhanced with Address Recognition
SPI: Enhanced with Double Buffer
AT89C2052 256 bytes 4 Kb Flash 15 1 3 UART: Enhanced with Address Recognition
SPI: Enhanced with Double Buffer
AT89C51 128 bytes 4 Kb Flash 32 2 6 ISP Flash Memory
AT89C52 256 bytes 8 Kb Flash 32 3 8 ISP Flash Memory
AT89C55 256 bytes 20 Kb Flash 32 3 8 Hardware Watchdog / Dual Data Pointer
AT89C51RB2256 bytes 16 Kb Flash 32 3 8 1024 intre nal Xram / Hardware Watchdog / Dual Data Pointer / SPI Port
AT89C51RC2256 bytes 32 Kb Flash 32 3 8 1024 intre nal Xram / Hardware Watchdog / Dual Data Pointer / SPI Port
AT89S51128 bytes 4 Kb Flash 32 2 6 ISP Flash Memory / Hardware Watchdog / Dual Data Pointer
AT89S52256 bytes 8 Kb Flash 32 3 8 ISP Flash Memory / Hardware Watchdog / Dual Data Pointer
AT89S8253256 bytes 12 Kb Flash 32 3 9 3Kb Eeprom / SPI / ISP Flash Memory / Hardware Watchdog / Dual Data Pointer

*) The AT89C52 / 51 and the STC89C52 / 51 are the most common used nowedays and common available.

The 8051 internals

8051 internal

*) It may look that the processor is very low on registers, but the whole 32 bytes of internal RAM is devided into 4 x 8 bytes register banks making a total of minimal 8 registers (with two of them being indirect address pointers) up to 32 intenal registers in 8 bytes chenks.

The 8051 pins

8051 pins

Description of the Pins:

Pin 1 to Pin 8 (Port 1)

Pin 1 to Pin 8 are assigned to Port 1 for I/O operations, they can be configured as input or output pins, if logic zero (0) is applied to the I/O port it will act as an output pin and if logic one (1) is applied the pin will act as an input pin.

Pin 9 (RST)

The reset pin is an active-high input pin. If the RST pin is high for a minimum of 2 machine cycles, the microcontroller will reset, it is often referred as power-on-reset. In normal circuits this is done with simple capacitor and resistor and if you want a reset button, you can add this parallel to the capacitor.

Pin 10 to Pin 17 (Port 3)

These pins are I/O port 3 pins, these pins are similar to port 1 and can be used as universal input or output pins. These pins also have some additional functions which are as follows:

  • (10) P3.0 (RXD) : Serial data receive pin which is for serial input.
  • (11) P3.1 (TXD) : Serial data transmit pin which is serial output pin.
  • (12) P3.2 (INT0) : External Hardware Interrupt 0.
  • (12) P3.3 (INT1) : External Hardware Interrupt 1.
  • (13) P3.4 (T0) : Timer 0 external input, tis pin can be logical connected with a 16 bit timer/counter.
  • (14) P3.5 (T1) : Timer 1 external input, tis pin can be logical connected with a 16 bit timer/counter.
  • (16) P3.6 (WR’) : External memory write, you have to use this pin when you add external SRAM.
  • (17) P3.7 (RD’) : External memory read , you have to use this pin when you add external SRAM or ROM.

Pin 18 and Pin 19 (XTAL2 And XTAL1)

These pins are connected to an external oscillator which is generally a quartz crystal oscillator with two small capacitors.

Pin 20 (GND)

This pin is connected to the ground (0V power supply).

Pin 21 to Pin 28 (Port 2)

Pin 21 to pin 28 are port 2 pins, these pins can be used as general I/O pins. But when you use external memory these pins provide the higher-order address byte A8..A15.

Pin 29 (PSEN)

PSEN stands for Program Store Enable. It is and active-low output pin to read external code memory, this pin is connected to the OE pin of the ROM.

Pin 30 (ALE)

ALE stands for Address Latch Enable, it is an active-high output pin, this pin is used to latch the low address (A0..A7) of port 0 to an external latch and when not active port 0 is the data in and output.

Pin 31 (EA)

EA stands for External Access input. It is used to enable / disable external memory interfacing. If EA is connected to Vcc the chip will use the internal ROM, when this line is connected to GND the chip will use the external ROM.

Pin 32 to Pin 39 (Port 0)

Pin 32 to pin 39 are port 0 pins that can be used as normal bidirectional I/O pins, however they don’t have any internal pull-ups. These pins also used as bidirectional Data bus and provide the low part of the external; address (D0..D7) when ALE is active. When used as data / address lines they can no longer be used as I/O pins.

Pin 40 (VCC)

This pin provides power supply voltage to the chip, most of the time 5 volt, but some variants use 3.3 volt.

Minimal hardware design schematics

8051 minimal hardware design schematics

This is the typical design you will find on the (Chinese) minimal hardware boards (they often add a power supply as well) and it uses the internal ROM / EPROM code and the internal ram only. I have written lots of hardware using this design, the internal ram is verry useful because of the bit addressable area that can be used as Booleans (flags) in a program, and with the 4 register banks it is easy to write simple interrupt handlers, just switch the bank on an interrupt and switch it back before you leave the interrupt routine. When using a 8752 you have the extra high 128 bytes of internal ram and the code can be easily burned over and over again in the Flash eprom on chip. This configuration has a LOT of available I/O lines, a serial input output, timers and interrupt so its is very nice to use in embedded systems. For instance you could build a complete full keyboard interface, just using this simple design. For programming the chip you can use an eprom programmer or you can use In Circuit Programming with and USB adapter on several family members of Atmel and STC.

Minimal basic computer hardware design schematics

8051 minimal basic computer hardware design schematics

This design uses internal code and externa 64 Kb SRAM, you can see that port 0 and 2 are external data and address lines and we use the RD and WR pin of port 3. In this design I used an original 8052-basic chip from Intel, but you can also use an AT89C52 from Atmel or STC to program the basic code into the Flash rom of the 8052 processor. This design uses a 8052 because it needs the 256 bytes internal ram. You can find the sourcecode of the basic versions 1.0 and 1.3 in the example directory of my 8052 IDE program (also on this site). You have to connect this design with a USB TTL / serial adapter to a PC or to a TTL compatible terminal. It will do autobaud on pressing the spacebar. Just build this design, upload the code into a 8052 and you have a working floating point Basic interpreter based microcomputer that can also use the unused pins to control external hardware.

Minimal full external eprom and ram hardware design schematics

8051 full eprom and ram omputer hardware design schematics

This is the most complex design I made with a 64 kb external ROM / Eprom / Flash rom and 32 Kb of ram. I use 32kb of ram because these chips are commonly available and otherwise you would have to switch the next step and that is a 128 kb ram of which you only use half. In my case 32 Kb is more than enough for all cases. If we look at the design we see the same address latch and for the ram a little more logic to generate the output enable signal. This is a safe design. I also added a reset button and a EA selection pin if you want to use the board also to run code inside the 8051 chip. The design is not that complex, the 51 family is a very easy to implement microcontroller. Also in this design you have a lot of free I/O ports to control anything. It also uses a TTL level serial interface,

Adding a real RSR232 interface to a 8051 processor schematics

8051 RS232 hardware design schematics

If you want to connect a 8051 to a read RS232 terminal you will need a RS232 level converter chip. If you do not know what RS232 is look here. This is my simple basic design for a RS232 interface, you can use this on almost every single board computer design, it does not support any control lines, just the basic TX and RX lines. It uses the MAX232 chip that is still commonly available. Personally I like to keep things simple.

8051 internal ram mapping

8051 intenal ram mapping

This ia the ram mapping, the first 32 bytes are reserved for register banks, but if you do not use these banks you can lso address then as common mamory. Then there us an eara that is bit addressable, again if you do not use this you can address these bytes as normal mamory bytes, you can even do both. The rest of the mamory up to 0x7f is common ram where also the stack lives. The area above 0x7f are Special Function Registers and when you write to them as normal memory you will write directly into these registers. In the 8052 this upper 128 bytes of ram that is at the same address space as the SFR is only accessable with indexed addressing mode trough R0, R1 or DPTR. This can be tricky if you do not understand this completely. After reset the SP stack pointer is at address 0x07, one of the first things I dos is set this to a safe address.

SFR registers on different types of 8051 family members

0 / 81 / 92 / A3 / B4 / C5 / D6 / E7 / F
F0 B
E8 P4
B0 P3
90 P1

  •    Standard 8031 / 8051 SFR registers.
  •    Extra 8032 / 8052 processor.
  •    Extra 8952 processor.

The AT89C52 datasheet has a discription of all SFR registers.

It is fun writing code for the 8051 family processors, they are very fast, have a lot of I/O ports, a very nice instruction set and when you take the challenge of building a complete application just using 192 bytes of ram you will find that especially the bit addressable area is very clever to store flags, a Boolean value will only take up one BIT of memory. I have written a very complete developers IDE for the 8051 processor that also supports the 89c52 hardware. It has a assembler, disassembler, emulator, single step debugger, TV100 terminal, seven segment displays and output leds on board. Also I provide som example code and some sourecode from Intel. For a good understanding of all the instructions and tips and tricks, there are nice books and online tutorials, this page is intended as a guide to the internals and te hardware design of this wonderful chip.

Last update: 22-05-2022

Disclaimer: All pages on this Web site are copyrighted by Hein Pragt, unless otherwise noted. I strive for accuracy but cannot be held responsible for any errors in the content. For questions about the content of this site or persmission to copy you can contact me at: (email: is registered under KvK number: 73839426.